GJ-58003 Integrated Epitaxial Substrate

Product Information
The reason why semiconductor silicon epitaxial wafers are widely recognized by domestic and foreign customers is mainly due to the integrated production of the product, while mastering the three major process technologies of crystal growth, silicon wafer forming, and epitaxial growth, complementing and reinforcing each other to achieve high-quality epitaxial layers. The technology of polishing pads has a significant impact on our company's competitiveness.

Product parameters
Diameter: 125/150/200 mm
Epitaxial doping value: P-type; N-type
Doping agent/resistivity range (ohm cm):
Boron (B) 0.0005~>1000
Phosphorus (P) 1-100
Red phosphorus (RedP) 0.0009~0.0015
Arsenic (As) 0.0019~0.007
Antimony (Sb) 0.007~0.025
Crystal orientation: (111), (100)

Process Introduction
Polishing wafers are mainly divided into two key processes: crystal growth technology and silicon wafer forming technology.
 
Crystal Growth Technology
The focus of single crystal growth technology is to ensure that the drawn silicon single crystal rod can maintain a high level of purity while effectively controlling the density of crystal defects, thereby reducing the number of defects in the silicon wafer made from it. For a long time, only a few silicon wafer manufacturers in Japan, Europe, and America have the technical ability to produce ultra-low defect silicon single crystal rods, and Shanghai Hejing is one of the few domestic manufacturers that can independently develop ultra-low defect silicon single crystal rod growth technology.
 
We use the CZ method to grow wafers (100) and (111) single crystals, doping P-type boron atoms or N-type phosphorus, arsenic, and antimony atoms to control resistivity. Combined with a comprehensive long crystal thermal field system and specific process settings such as pressure, flow rate, and temperature, we adjust RRG, oxygen content, ORG, micro defects, and other related parameters to meet customer product requirements, achieve the growth of ultra-low resistance crystal rods, and reduce the on resistance value of power devices. This is also an extremely important contribution of epitaxial wafers using heavily doped substrates.

Silicon wafer forming technology
Silicon wafers are the foundation of semiconductor components, and their quality has a decisive impact on the assembly of semiconductor devices. Silicon wafer processing mainly includes multiple processes such as wafer slicing, wafer chamfering, wafer grinding, wafer corrosion, wafer back processing, wafer polishing, wafer cleaning, wafer testing, and packaging.

Crystal rod slicing
Cut the crystal rod into silicon wafers with precise geometric dimensions using a cutting machine, and control the warpage and stress distribution of the silicon wafers by adjusting the relevant parameters of the machine.

Silicon wafer chamfering
After slicing the silicon wafer, its edges usually have sharp angles and minor damage. This process can effectively remove the edge damage of the silicon wafer and achieve a certain degree of refinement. Suitable chamfering can help eliminate the possibility of damage to the polished or epitaxial wafer during the circuit manufacturing process in the future.

Silicon wafer grinding
The key process that affects the warpage, flatness, and thickness uniformity of wafer products. The slicing process can cause damage to the surface of silicon wafers, so this process is used for processing to remove the above-mentioned damaged layers.

Silicon wafer corrosion
After slicing and grinding, a damaged layer is formed on the surface of silicon wafers due to mechanical processing stress. The etching process uses an appropriate ratio of acidic or alkaline solution to remove the surface damaged layer through chemical reaction within a precise temperature control range.

Crystal back processing
Crystal back processing includes three processes: sandblasting, polycrystalline silicon thin film, and silicon dioxide thin film. These three crystal back processing processes can be combined according to different needs. Among them, sandblasting and polycrystalline silicon thin films have external impurity absorption effects;, Silicon dioxide can suppress the self doping effect during epitaxial growth.

Silicon wafer polishing
By using chemical mechanical polishing, the etched surface of the wafer is flattened to a nanometer level smoothness, while taking into account various indicators such as warpage and flatness of the silicon wafer, to avoid problems encountered in the lithography process of silicon wafers in high-end applications.

Wafer cleaning 
Remove various pollutants from the surface of silicon wafers, such as surface dust particles, organic matter, metals, and other possible contaminants.

Silicon wafer testing
Silicon wafers undergo final cleaning after measuring their physical properties such as resistivity, thickness, flatness, and curvature using equipment. Then, high-precision equipment is used to detect surface defects such as dust particles, organic matter, and metals to ensure that the quality of the silicon wafers meets customer requirements.
packing

After packaging the silicon wafers in a silicon wafer box, PE bags and aluminum foil bags are wrapped around the outer surface of the silicon wafer box through the packaging process, so that their quality will not be damaged by environmental or external factors during storage and transportation.

Product application
Our company's integrated epitaxial technology can be matched with corresponding epitaxial parameters based on the doping and resistance values of different substrates to meet customers' highly customized needs. It can be used for the production of analog circuit products such as power devices and CIS.